In the 1970's inexpensive integrated-circuits were becoming widely available, and chips with multiple functions - such as flip-flops, counters, AND, OR, NOR, NAND logic-gates, parity checkers, operational amplifiers, switches, and similar DIP modules (14 to 16-pin Dual In-line Pin connections in plastic encapsulated modules) were rapidly replacing individual transistors as the preferred means of implementing electronic functions in our WLC/MRC OMR Scanners. Accordingly, I became concerned that our key WLC/MRC engineering staff involved in circuit/logic designs would have current knowledge and skills to take full advantage of a rapidly changing design landscape. Thus, I hired University of Iowa Professor John Robinson, Electrical Engineering Dept. to develop an intensive several-week short course to be taught at our MRC facility. I assisted him in the preparation of the content - and the final exam - to be tailored specifically to our needs. This JVM Accession package consists of four documents: 1) my 5-page handwritten notes prepared for a speech I gave to our Engineering staff to explain why they were required to attend this in-house short-course; 2) A copy of the 15-page course 51-question final exam, entitled "Digital Logic Background Knowledge Test" that each staff member took following the completion of Robinson's course; 3) A copy of the 15-page document that gives the answers to the 51 questions; 4) A 1-page JVM handwritten recollection dated January 3, 1982 which reflects upon the test, and how the I could have 'aced it' in 1974, but would probably 'flunk it' in 1982, only partly jesting! A review of the 51-item course content will provide a good glimpse into the integrated-logic and related design tools that were current over three decades ago, as I write this: January 4, 2007.